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@riscv-non-isa

RISC-V Non-ISA Specifications

The Open-Standard Instruction Set Architecture
README.md

Welcome to the RISC-V Non-ISA Specifications 👋

RISC-V Logo

Non-ISA specifications do not add new instructions, create or change opcodes, or in any way modify the RISC-V ISA. They do help us to develop an ecosystem around the ISA Specifications.

Things you'll find here include:

  • ABI Documentation
  • Architecture Tests
  • Specifications like Debug, Processor Trace, and Software Interrupts

If you don't find what you're looking for here, try one of our other GitHub organizations:

Popular repositories Loading

  1. riscv-asm-manual riscv-asm-manual Public

    RISC-V Assembly Programmer's Manual

    Makefile 1.6k 255

  2. riscv-elf-psabi-doc riscv-elf-psabi-doc Public

    A RISC-V ELF psABI Document

    Python 840 186

  3. riscv-sbi-doc riscv-sbi-doc Public

    Documentation for the RISC-V Supervisor Binary Interface

    Makefile 467 98

  4. riscv-rvv-intrinsic-doc riscv-rvv-intrinsic-doc Public

    C 370 110

  5. riscv-trace-spec riscv-trace-spec Public

    RISC-V Processor Trace Specification

    C 216 58

  6. riscv-iommu riscv-iommu Public

    RISC-V IOMMU Specification

    C 157 29

Repositories

Showing 10 of 32 repositories
  • riscv-rvv-intrinsic-doc Public
    riscv-non-isa/riscv-rvv-intrinsic-doc’s past year of commit activity
    C 370 BSD-3-Clause 110 27 16 Updated Apr 11, 2026
  • riscv-trace-spec Public

    RISC-V Processor Trace Specification

    riscv-non-isa/riscv-trace-spec’s past year of commit activity
    C 216 CC-BY-4.0 58 31 6 Updated Apr 10, 2026
  • riscv-hart-trace-interface Public

    This Fast-Track will extract the Hart-Trace Interface chapter from the E-Trace spec and turn it into a standalone spec

    riscv-non-isa/riscv-hart-trace-interface’s past year of commit activity
    Makefile 1 CC-BY-4.0 1 3 0 Updated Apr 10, 2026
  • riscv-c-api-doc Public

    Documentation of the RISC-V C API

    riscv-non-isa/riscv-c-api-doc’s past year of commit activity
    Makefile 84 CC-BY-4.0 50 15 7 Updated Apr 9, 2026
  • riscv-brs Public

    The Boot and Runtime Services (BRS) specification provides the software requirements for system vendors and Operating System Vendors (OSVs) to interoperate with one another by providing expectations for the Operating System (OS) to utilize in acts of device discovery, system management, and other rich operations provided in this specification.

    riscv-non-isa/riscv-brs’s past year of commit activity
    TeX 58 CC-BY-4.0 22 16 2 Updated Apr 8, 2026
  • riscv-rqsc Public

    Specification Documentation Repository for the RQSC RISC-V Quality of Services Controllers Table definition

    riscv-non-isa/riscv-rqsc’s past year of commit activity
    Makefile 0 CC-BY-4.0 1 0 2 Updated Apr 8, 2026
  • riscv-uefi Public
    riscv-non-isa/riscv-uefi’s past year of commit activity
    Makefile 34 CC-BY-4.0 7 0 1 Updated Apr 8, 2026
  • riscv-ras-eri Public

    The RAS Error-record Register Interface provides a specification to augment RAS features in RISC-V SOC hardware to standardize reporting and logging of errors by means of a memory-mapped register interface to enable error detection, provide the facility to log the detected errors, and configuration.

    riscv-non-isa/riscv-ras-eri’s past year of commit activity
    TeX 11 CC-BY-4.0 7 0 1 Updated Apr 8, 2026
  • riscv-e-trace-encap Public

    E-Trace Encapsulation Specification

    riscv-non-isa/riscv-e-trace-encap’s past year of commit activity
    Makefile 7 CC-BY-4.0 4 1 1 Updated Apr 8, 2026
  • riscv-acpi-rimt Public

    RISC-V ACPI I/O Mapping Table Specification

    riscv-non-isa/riscv-acpi-rimt’s past year of commit activity
    Makefile 7 CC-BY-4.0 5 2 1 Updated Apr 8, 2026
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