feat: add MediaTek Filogic CSI simulator and RuView ingestion

[ruvnet]

Summary

• add ADR-266 for the MediaTek Filogic/OpenWrt hardware and licensing boundary
• add ADR-267 for a bounded vendor-neutral MIMO CSI transport
• implement deterministic MT7981, MT7986, and MT7996 simulator profiles
• add CRC/length/dimension/finite-value validation, UDP, and replay output
• ingest MediaTek CSI in RuView with REST and WebSocket summaries
• correct older unverified MT7661/mt76 capture claims

Validation

• hardware suite: 183 passed, 1 intentional timing smoke ignored
• sensing-server suite: 177 passed
• targeted MediaTek codec and summary tests passed
• Clippy passed with existing repository warnings only
• optimized Windows simulator and sensing-server builds passed
• loopback UDP proof passed for MT7981 (2x3x256), MT7986 (2x4x256), and MT7996 (2x4x256)
• deterministic 100-frame replay SHA-256 matched across two runs
• oversized 4x4x1024 envelope correctly rejected at 65,616 bytes

Hardware boundary

This is a simulator and host-integration implementation. Upstream mt76 and public MediaTek SDK material do not expose a supported raw complex CSI API today. No private ABI, firmware, header, hardware capture, calibration, or sensing-accuracy claim is included.

[ruvnet]

Published as v0.9.1-mediatek-beta.1: https://github.com/ruvnet/RuView/releases/tag/v0.9.1-mediatek-beta.1 - upstream RFC: openwrt/mt76#1106 - update gist: https://gist.github.com/ruvnet/5ca5a27f2e607dcfcf0e3655fdec2d62