Skip to content
This repository was archived by the owner on Mar 2, 2021. It is now read-only.

Modified to use CLKBUF for chiplink rx clock#104

Open
donthus wants to merge 1 commit intosifive:freedom_microsemi_rebasedfrom
donthus:freedom_microsemi_rebased
Open

Modified to use CLKBUF for chiplink rx clock#104
donthus wants to merge 1 commit intosifive:freedom_microsemi_rebasedfrom
donthus:freedom_microsemi_rebased

Conversation

@donthus
Copy link
Copy Markdown

@donthus donthus commented Feb 5, 2019

No description provided.

@tmagik
Copy link
Copy Markdown
Contributor

tmagik commented Feb 13, 2019

I've built a version here https://github.com/tmagik/freedom/commits/donthus/freedom_microsemi_rebased, with submodule links to an older version of fpga-shells. With a 100mhz chiplink clock it passes timing and seems to be pretty stable.

What version of fpga-shells did you use this with?

@donthus
Copy link
Copy Markdown
Author

donthus commented Feb 13, 2019

I have used an updated fpga-shells at https://github.com/sifive/freedom/tree/freedom_microsemi_rebased (@ 8d5d73c) and created a pull request sifive/fpga-shells#54

@tmagik
Copy link
Copy Markdown
Contributor

tmagik commented Feb 15, 2019

The version I have only works at 100mhz. At 125mhz chiplink clock, I see data corruption on reads from the gpu, nvme, and sata disks. @terpstra is there a way to determine the correct phase delay for the tx clock without hooking up a scope? Is this something that could vary across different boards?

@donthus
Copy link
Copy Markdown
Author

donthus commented Feb 18, 2019

We have tested https://github.com/tmagik/freedom/commits/donthus/freedom_microsemi_rebased along with the fpga shells at sifive/fpga-shells#54. We have used Libero v12.0 to build the design and we don't see any issue.

@tmagik can you try updated fpga shells at sifive/fpga-shells#54

Sign up for free to subscribe to this conversation on GitHub. Already have an account? Sign in.

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

2 participants