ec: Add lemp14

[crawfxrd]

Requires:

• Add Panther Lake IDs intel-spi#13

[crawfxrd]

Flashing firmware-open to firmware-open doesn't work: "failed to get SPI device".
Need to update intel-spi?

[crawfxrd]

intel-spi works from Linux but panics on erase/write from firmware-update.

---

flashrom output for reference

$ sudo ./flashrom -VV -p internal
flashrom v1.8.0-devel (git:v1.2-1746-g9edf12ee4f53) on Linux 6.18.7-76061807-generic (x86_64)
flashrom is free software, get the source code at https://flashrom.org

flashrom was built with GCC 13.3.0, little endian
Command line (3 args): ./flashrom -VV -p internal
Initializing internal programmer
get_mtd_info: device_name: "BIOS", is_writeable: 0, numeraseregions: 0, total_size: 33554432, erasesize: 4096
Cannot open file stream for /dev/mtd0
Found candidate at: 00000500-00000528
Found coreboot table at 0x00000500.
Found candidate at: 00000000-0000088c
Found coreboot table at 0x00000000.
coreboot table found at 0x6b6c5000.
coreboot header(24) checksum: 9b41 table(2164) checksum: ca6e entries: 46
Vendor ID: System76, part ID: lemp14
Using Internal DMI decoder.
DMI string chassis-type: "Laptop"
Laptop detected via DMI.
DMI string system-manufacturer: "System76"
DMI string system-product-name: "Lemur Pro"
DMI string system-version: "lemp14"
DMI string baseboard-manufacturer: "System76"
DMI string baseboard-product-name: "Lemur Pro"
DMI string baseboard-version: "lemp14"
W836xx enter config mode worked or we were already in config mode. W836xx leave config mode had no effect.
Active config mode, unknown reg 0x20 ID: 55.
Found chipset "Intel Panther Lake-H 4Xe" with PCI ID 8086:e423.
Enabling flash write... Using libpci PCI_ACCESS_I386_TYPE1
BIOS_SPI_BC = 0x1900008b: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x0 (SPI)
Top Swap: not enabled
SPI Read Configuration: prefetching enabled, caching enabled,
BIOS_CNTL = 0x8b: BIOS Lock Enable: enabled, BIOS Write Enable: enabled
Warning: Setting BIOS Control at 0xdc from 0x8b to 0x89 failed.
New value is 0x8b.
SPIBAR = 0x000071179b320000 (phys = 0xdc91e000)
0x04: 0xf800 (HSFS)
HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=0, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1
SPI Configuration is locked down.
Reading OPCODES... done
        OP        Type      Pre-OP
op[0]: 0x01, write w/o addr, none
op[1]: 0x02, write w/  addr, none
op[2]: 0x03, read  w/  addr, none
op[3]: 0x05, read  w/o addr, none
op[4]: 0x20, write w/  addr, none
op[5]: 0x9f, read  w/o addr, none
op[6]: 0xd8, write w/  addr, none
op[7]: 0x0b, read  w/  addr, none
Pre-OP 0: 0x06, Pre-OP 1: 0x50
0x06: 0x0000 (HSFC)
HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0
0x08: 0x01ffffc0 (FADDR)
0x0c: 0x00001f00 (DLOCK)
DLOCK: BMWAG_LOCKDN=0, BMRAG_LOCKDN=0, SBMWAG_LOCKDN=0, SBMRAG_LOCKDN=0,
       PR0_LOCKDN=1, PR1_LOCKDN=1, PR2_LOCKDN=1, PR3_LOCKDN=1, PR4_LOCKDN=1,
       SSEQ_LOCKDN=0
0x118: 0xffff (BIOS_BM_RAP)
0x11a: 0xffff (BIOS_BM_WAP)
0x54: 0x00030000 FREG0: Flash Descriptor region (0x00000000-0x00003fff) is read-write.
0x58: 0x1fff1000 FREG1: BIOS region (0x01000000-0x01ffffff) is read-write.
0x5C: 0x08f90004 FREG2: Management Engine region (0x00004000-0x008f9fff) is read-write.
0x60: 0x00007fff FREG3: Gigabit Ethernet region is unused.
0x64: 0x00007fff FREG4: Platform Data region is unused.
0x68: 0x00007fff FREG5: Device Expansion region is unused.
0x6C: 0x00007fff FREG6: BIOS2 region is unused.
0x70: 0x00007fff FREG7: unknown region is unused.
0x74: 0x00007fff FREG8: EC/BMC region is unused.
0x78: 0x0fff0ae1 FREG9: Device Expansion 2 region (0x00ae1000-0x00ffffff) is read-write.
0x7C: 0x0ae008fa FREG10: Innovation Engine region (0x008fa000-0x00ae0fff) is read-write.
0x80: 0x00007fff FREG11: 10GbE0 region is unused.
0xE0: 0x00007fff FREG12: 10GbE1 region is unused.
0xE4: 0x00007fff FREG13: unknown region is unused.
0xE8: 0x00007fff FREG14: unknown region is unused.
0xEC: 0x00007fff FREG15: PTT region is unused.
0x84: 0x00000000 (PR0 is unused)
0x88: 0x00000000 (PR1 is unused)
0x8C: 0x00000000 (PR2 is unused)
0x90: 0x00000000 (PR3 is unused)
0x94: 0x00000000 (PR4 is unused)
0x98: 0x00000000 (GPR0 is unused)
0xa0: 0x80 (SSFS)
SSFS: SCIP=0, FDONE=0, FCERR=0, AEL=0
0xa1: 0xf60000 (SSFC)
SSFC: SCGO=0, ACS=0, SPOP=0, COP=0, DBC=0, SME=0, SCF=6
0xa4: 0x5006 (PREOP)
0xa6: 0xb32d (OPTYPE)
0xa8: 0x05030201 (OPMENU)
0xac: 0x0bd89f20 (OPMENU+4)
0xc4: 0xf1d82084 (LVSCC)
LVSCC: BES=0x0, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=1
0xc8: 0x00002000 (UVSCC)
UVSCC: BES=0x0, WG=0, WSR=0, WEWS=0, EO=0x20
Reading flash descriptors mapped by the chipset via FDOC/FDOD... done.
=== Content Section ===
FLVALSIG 0x0ff0a55a
FLMAP0   0x00040003
FLMAP1   0x9a400208
FLMAP2   0x00030180

--- Details ---
NR          (Number of Regions):                    16
FRBA        (Flash Region Base Address):         0x040
NC          (Number of Components):                  1
FCBA        (Flash Component Base Address):      0x030
ISL         (ICH/PCH/SoC Strap Length):            154
FISBA/FPSBA (Flash ICH/PCH/SoC Strap Base Addr): 0x400
NM          (Number of Masters):                     2
FMBA        (Flash Master Base Address):         0x080
MSL/PSL     (MCH/PROC Strap Length):                 1
FMSBA       (Flash MCH/PROC Strap Base Address): 0x800

=== Component Section ===
FLCOMP   0xbff0c0f6
FLILL    0xad604221
FLILL1   0xc7c4b9b7

--- Details ---
Component 1 density:            32 MB
Component 2 is not used.
Read Clock Frequency:           100 MHz
Read ID and Status Clock Freq.: reserved
Write and Erase Clock Freq.:    reserved
Fast Read is supported.
Fast Read Clock Frequency:      reserved
Dual Output Fast Read Support:  disabled
Invalid instruction 0:          0x21
Invalid instruction 1:          0x42
Invalid instruction 2:          0x60
Invalid instruction 3:          0xad
Invalid instruction 4:          0xb7
Invalid instruction 5:          0xb9
Invalid instruction 6:          0xc4
Invalid instruction 7:          0xc7

=== Region Section ===
FLREG0   0x00030000
FLREG1   0x1fff1000
FLREG2   0x08f90004
FLREG3   0x00007fff
FLREG4   0x00007fff
FLREG5   0x00007fff
FLREG6   0x00007fff
FLREG7   0x00007fff
FLREG8   0x00007fff
FLREG9   0x0fff0ae1
FLREG10   0x0ae008fa
FLREG11   0x00007fff
FLREG12   0x00007fff
FLREG13   0x00007fff
FLREG14   0x00007fff
FLREG15   0x00007fff

--- Details ---
Region 0 (Descr. ) 0x00000000 - 0x00003fff
Region 1 (BIOS   ) 0x01000000 - 0x01ffffff
Region 2 (ME     ) 0x00004000 - 0x008f9fff
Region 3 (GbE    ) is unused.
Region 4 (Platf. ) is unused.
Region 5 (DevExp ) is unused.
Region 6 (BIOS2  ) is unused.
Region 7 (unknown) is unused.
Region 8 (EC/BMC ) is unused.
Region 9 (unknown) 0x00ae1000 - 0x00ffffff
Region 10 (IE     ) 0x008fa000 - 0x00ae0fff
Region 11 (10GbE0 ) is unused.
Region 12 (10GbE1 ) is unused.
Region 13 (unknown) is unused.
Region 14 (unknown) is unused.
Region 15 (PTT    ) is unused.

=== Master Section ===
FLMSTR1  0xffffffff
FLMSTR2  0xffffffff

--- Details ---
       FD    BIOS    ME    GbE    Pltf    DE   BIOS2   Reg7    EC    DE2    IE   10GbE0 10GbE1  RegD   RegE   PTT
BIOS   rw     rw     rw     rw     rw     rw     rw     rw     rw     rw     rw     rw     rw     rw     rw     rw
ME     rw     rw     rw     rw     rw     rw     rw     rw     rw     rw     rw     rw     rw     rw     rw     rw

Enabling hardware sequencing by default for Apollo/Gemini/Jasper/Elkhart/Meteor/Panther Lake/Wildcat Lake.
OK.
No board enable found matching coreboot IDs vendor="System76", model="lemp14".
The following protocols are supported: Programmer-specific.
Probing for Programmer Opaque flash chip, 0 kB: Hardware sequencing reports 1 attached SPI flash chip with a density of 32768 kB.
There is only one partition containing the whole address space (0x000000 - 0x1ffffff).
There are 8192 erase blocks with 4096 B each.
HSFC: FGO=1, FCYCLE=2, FDBC=2, SME=0
Chip identified: PY25F256LC
Added layout entry 00000000 - 01ffffff named complete flash
Found PUYA flash chip "PY25F256LC" (32768 kB, Programmer-specific) on internal.
Found PUYA flash chip "PY25F256LC" (32768 kB, Programmer-specific).
This chip may contain one-time programmable memory. flashrom cannot read
and may never be able to write it, hence it may not be able to completely
clone the contents of this chip (see man page for details).
No operations were specified.
Restoring PCI config space for 00:1f:5 reg 0xdc
Runtime from programmer init to shutdown: 0min 0sec