Preserve targeted repair in safe trace branch

[ShiboSoftwareDev]

Issue

The safe trace-layer branch copied the portfolio options and then forced enableTargetedErrorSweep off. That prevented the existing exact same-net via repair from cleaning up a via violation created while resolving trace collisions.

Implementation

Remove that override so the branch honors the caller setting. With targeted repair enabled, the existing same-net via canonicalization runs before the branch finishes. No solver or fallback is added.

The reproduction snapshot changes from one pcb_via_clearance_error to no DRC errors.

Stacked on #53.

Checks

• GitHub Actions CI

[tscircuitbot]

Benchmark This PR

Run benchmarks by commenting on this PR:

/benchmark [benchmark.sh args...]
/benchmark [scenario-limit|all] --dataset <drc14|srj18> --concurrency <n> --effort <n> --max-iterations <n>

Everything after /benchmark is forwarded directly to ./benchmark.sh.

Examples:

• /benchmark -> run default SRJ18 benchmark settings
• /benchmark 10 -> run first 10 SRJ18 samples
• /benchmark --dataset srj18 -> run all SRJ18 samples
• /benchmark 1 --dataset srj18 -> run the first SRJ18 sample
• /benchmark --dataset drc14 -> run all DRC14 samples
• /benchmark all --concurrency 4 -> run all SRJ18 samples with 4 workers
• /benchmark --scenario-limit all --effort 2 -> run all samples with effort 2
• /benchmark --scenario-limit 20 --max-iterations 100 -> run 20 samples with a max iteration override

Any PR whose title contains [BENCHMARK TEST] will automatically run the benchmark workflow on PR updates.

[ShiboSoftwareDev]

Production validation in tscircuit/tscircuit-autorouter#1934 shows no effect on the affected boards: Dataset 18 sample 8 remains at 24 DRC errors with four via-clearance errors, and Dataset 24 sample 2 remains at 75 DRC errors with two via-clearance errors. This PR should not be treated as the benchmark root fix.