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[Bugfix][SM121] Extend TrtLlmFp8ExpertsBase device gate to SM_12x (consumer Blackwell / DGX Spark)#43911

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[Bugfix][SM121] Extend TrtLlmFp8ExpertsBase device gate to SM_12x (consumer Blackwell / DGX Spark)#43911
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vllm-project:mainfrom
tgmerritt:fix/sm121-trtllm-mxfp8-moe-device-gate

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Summary

TrtLlmFp8ExpertsBase._supports_current_device() gated on is_device_capability_family(100) (SM_10x — B100/B200 datacenter Blackwell only). This caused MXFP8 MoE to always fall back to MARLIN W8A16 on SM_120/SM_121 hardware (RTX 5000-series, DGX Spark / GB10), even though SM_12x implements the same tcgen05.mma MX tensor core instructions as SM_10x.

One-line fix: add or is_device_capability_family(120) to include SM_12x.

This is the vLLM-side gate. Full enablement requires FlashInfer to ship flashinfer_trtllm_moe compiled for SM_12x targets (tracked in #43906).

Root cause

# Before
@staticmethod
def _supports_current_device() -> bool:
    p = current_platform
    return (
        p.is_cuda()
        and p.is_device_capability_family(100)   # SM_10x only
        and has_flashinfer_trtllm_fused_moe()
    )

On SM_121: is_device_capability_family(100)False → MARLIN fallback.

# After
    return (
        p.is_cuda()
        and (p.is_device_capability_family(100)
             or p.is_device_capability_family(120))   # SM_10x + SM_12x
        and has_flashinfer_trtllm_fused_moe()
    )

Verification on NVIDIA GB10 / DGX Spark (SM_121)

>>> current_platform.get_device_capability()
DeviceCapability(major=12, minor=1)
>>> current_platform.is_device_capability_family(100)
False    # was blocking TRTLLM path
>>> current_platform.is_device_capability_family(120)
True     # now passes device gate

Server log before this fix:

INFO [mxfp8.py:88] Using 'MARLIN' MxFp8 MoE backend.

With this fix applied + FlashInfer compiled for SM_121, the TRTLLM path will be used and MoE layers will execute on the native Blackwell MX path rather than dequantizing to BF16.

Related

Testing

Verified on NVIDIA GB10 / DGX Spark (SM_121) — the only consumer SM_121 hardware currently accessible for testing outside of NVIDIA/Google. Happy to run follow-up tests once FlashInfer ships SM_12x kernel binaries.

🤖 Generated with Claude Code

…_12x (consumer Blackwell / DGX Spark)

`TrtLlmFp8ExpertsBase._supports_current_device()` previously gated on
`is_device_capability_family(100)` (SM_10x — B100/B200 datacenter Blackwell
only). This caused MXFP8 MoE to always fall back to MARLIN W8A16 on
SM_120/SM_121 (RTX 5000-series, DGX Spark GB10), even though both SM families
implement the same `tcgen05.mma` MX tensor core instructions.

Fix: add `or is_device_capability_family(120)` to include SM_12x.

This is the vLLM-side gate change. To fully enable FLASHINFER_TRTLLM on
SM_12x, `flashinfer_trtllm_moe` also needs to be compiled with SM_120/SM_121
targets (tracked in vllm-project#43906).

Verified on NVIDIA GB10 / DGX Spark (SM_121):
- Before: `is_device_capability_family(100)` returns False → MARLIN selected
- After:  `is_device_capability_family(120)` returns True → device gate passes
- `has_flashinfer_trtllm_fused_moe()` remains the gating factor until
  the FlashInfer build includes SM_12x kernel binaries.

Fixes part of vllm-project#43906.

Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>

Signed-off-by: Tyler Merritt <tgmerritt@gmail.com>
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