feat(Singlepass, Cranelift): add --enable-unaligned-memory-accesses (v2)#6388
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feat(Singlepass, Cranelift): add --enable-unaligned-memory-accesses (v2)#6388
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Pull request overview
This PR introduces an opt-in --enable-unaligned-memory-accesses switch to control whether the Cranelift and Singlepass (RISC-V) compilers emit runtime-safe handling for potentially unaligned memory loads/stores, alongside adding a WAST regression test for unaligned accesses.
Changes:
- Add CLI flag
--enable-unaligned-memory-accessesand plumb it into Cranelift and Singlepass compiler configurations. - Implement Cranelift-side unaligned load/store handling via aligned fast-path + bytewise slow-path.
- Add a WAST test plus test-harness wiring to exercise unaligned loads/stores when the flag is enabled.
Reviewed changes
Copilot reviewed 13 out of 14 changed files in this pull request and generated 2 comments.
Show a summary per file
| File | Description |
|---|---|
| tests/wast/wasmer/unaligned-memory-access.wast | Adds a WAST test exercising unaligned load/store behaviors. |
| tests/compilers/wast.rs | Enables unaligned-handling in test runs for the new unaligned WAST. |
| tests/compilers/config.rs | Plumbs an allow_unaligned_memory_accesses test config option into compiler setup. |
| lib/compiler/src/compiler.rs | Adds a CompilerConfig hook method for enabling unaligned access handling. |
| lib/compiler-singlepass/src/machine.rs | Updates RISC-V MachineRiscv::new call sites to pass the new flag argument. |
| lib/compiler-singlepass/src/machine_riscv.rs | Stores and uses the unaligned-access flag to select safe vs native load/store sequences. |
| lib/compiler-singlepass/src/config.rs | Exposes allow_unaligned_memory_accesses configuration on Singlepass. |
| lib/compiler-singlepass/src/compiler.rs | Wires Singlepass config flag into MachineRiscv::new. |
| lib/compiler-cranelift/src/translator/func_translator.rs | Threads the unaligned-access flag through function translation. |
| lib/compiler-cranelift/src/translator/code_translator.rs | Implements runtime alignment check + bytewise slow-path for loads/stores when enabled. |
| lib/compiler-cranelift/src/config.rs | Adds config storage and CompilerConfig enable hook for unaligned access handling. |
| lib/compiler-cranelift/src/compiler.rs | Passes the flag into FuncTranslator creation (both non-rayon and rayon paths). |
| lib/cli/src/backend.rs | Adds the --enable-unaligned-memory-accesses flag and applies it to Cranelift/Singlepass configs. |
| .gitignore | Adds .codex to ignored files. |
Co-authored-by: Copilot <175728472+Copilot@users.noreply.github.com>
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Right now, the RISC-V single-pass compiler emits 1-byte loads and stores (as a runtime check) to avoid strict alignment violations. This PR changes the default to use full-size native load/store operations, while still providing an option to retain the previous behavior. Similarly, for Cranelift, we now support this functionality by incorporating @wakabat’s changes.
@tsahee @wakabat - can you test the change if it fits your needs?
Relates: #6024