Imx95 m7 support pdm - #113577
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zephyrbot
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area: Boards/SoCs
area: I2S
area: Samples
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| * NOTE: PDM shares the PDM_CLK/PDM_BIT_STREAM0 pins with FLEXCAN1. | ||
| * The PDM_CAN_SEL line (gpio_can bit 10) selects between them. To use PDM, | ||
| * FLEXCAN1 must be disabled and PDM_CAN_SEL set to select PDM. | ||
| */ |
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Maybe we should clarify the PDM_CAN_SEL function/polarity in the comment as well?
/*
- NOTE: PDM shares the PDM_CLK/PDM_BIT_STREAM0 pins with FLEXCAN1.
- The PDM_CAN_SEL line (gpio_can bit 10) selects between them.
- 0 = PDM
- 1 = FLEXCAN1
- FLEXCAN1 must be disabled and PDM_CAN_SEL set to select PDM.
*/
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fixed, please review again
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fixed, please review again
LGTM
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❌ The last analysis has failed. |
| CONFIG_SAMPLE_FREQ=16000 | ||
| CONFIG_EXTRA_BLOCKS=12 | ||
| CONFIG_EXTRA_BLOCKS=2 | ||
| CONFIG_I2S_INIT_BUFFERS=2 |
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Please explain in the commit message why you change extra_blocks from 12 to 2.
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Please explain in the commit message why you change extra_blocks from 12 to 2.
With CONFIG_EXTRA_BLOCKS=12, the compiled binary exceeds the available RAM size on the imx95_evk_mimx9596_m7 board.
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@ZhaoQiang-b45475 this information should be added in the commit message. This explanation in the comment will be lost in github history :)
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@dbaluta Thanks for the suggestion! I've addressed this in the new version
|
Hi All, any comments? |
| * The PDM_CAN_SEL line (gpio_can bit 10) selects between them: | ||
| * 0 = PDM | ||
| * 1 = FLEXCAN1 | ||
| * To use PDM, FLEXCAN1 must be disabled and PDM_CAN_SEL set to 0 (PDM). |
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But now flexcan1 and PDM both are enabled by default, it is easy to introduce some issue if customer use PDM directly but not disable FlexCAN, suggest to set PDM to be disabled by default.
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I agree. I found that gpio_can bit 10 is still set as active high in the DTS. Even though flexcan1 is disabled in samples/drivers/i2s/i2s_codec/boards/imx95_evk_mimx9596_m7.overlay, I believe the best approach at the moment is to disable PDM in the code.
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Hi @JiafeiPan and @RuoshanShi,
Fixed, thanks for your comment
Add PDM node to device tree on imx95 m7 Signed-off-by: Qiang Zhao <qiang.zhao@nxp.com>
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Add imx95_evk_mimx9596_m7.overlay to route the i2s_codec sample through the PDM (&pdm) interface instead of SAI. Update imx95_evk_mimx9596_m7.conf to enable CONFIG_AUDIO_DMIC and select the NXP MICFIL driver. Reduce CONFIG_EXTRA_BLOCKS from 12 to 2: with 12 extra blocks the compiled binary exceeds the available RAM on the imx95_evk_mimx9596_m7 board, causing a link failure. 2 blocks is sufficient for PDM capture. Signed-off-by: Qiang Zhao <qiang.zhao@nxp.com>
Add set_pdm_clock() to configure the PDM clock: - parent = AUDIOPLL1, rate = 196.608 MHz The AUDIOPLL1 chain is shared with SAI via set_audiopll1_clock(), which is guarded by both nxp_mcux_i2s and nxp_micfil. SAI and PDM clock setup functions are each guarded by their own compat check. Signed-off-by: Qiang Zhao <qiang.zhao@nxp.com>
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5 participants
This series adds PDM (Pulse Density Modulation) microphone support for the i.MX95 EVK Cortex-M7 core, enabling audio capture via the MICFIL peripheral.
Changes
dts: arm: nxp: imx95: Add PDM node for m7
Add pdm node with 8 channel sub-nodes to dts/arm/nxp/imx/nxp_imx95_m7.dtsi
Add PDM pinmux group (pinmux_pdm) to boards/nxp/imx95_evk/imx95_evk-pinctrl.dtsi
Enable the PDM node in boards/nxp/imx95_evk/imx95_evk_mimx9596_m7.dts, selecting channels 0/1 for a stereo capture path
samples: i2s_codec: add pdm support for imx95_evk m7
Add imx95_evk_mimx9596_m7.overlay to route the i2s_codec sample through the PDM (&pdm) interface instead of SAI
Update imx95_evk_mimx9596_m7.conf to enable CONFIG_AUDIO_DMIC and select the NXP MICFIL driver
soc: imx95: m7: add PDM clock setup for all enabled PDM instances
Add set_pdm_clock() in soc/nxp/imx/imx9/imx95/m7/soc.c to configure the PDM root clock: parent = AUDIOPLL1, rate = 196.608 MHz
The AUDIOPLL1 chain is shared with SAI; each peripheral's clock setup function is guarded by its own compatible check to avoid redundant calls
Testing
Verified audio capture on i.MX95 EVK M7 using the i2s_codec sample with a PDM microphone connected to the PDM0 interface.