Add frdm mcxa287 support - #117409
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Add initial Zephyr board support for FRDM-MCXA287, cloned from the existing FRDM-MCXA577 enablement since both boards share the same die and board schematic. MCXA287 omits ENET, ESPI, T1S, and TSI relative to MCXA577; every other FRDM-MCXA577 Zephyr feature is carried over unchanged. - soc/nxp/mcx/mcxa/Kconfig.soc: add SOC_MCXA287 and its 3 part number symbols under the existing mcxaxx7 series. - soc/nxp/mcx/soc.yml: register mcxa287 in the mcxaxx7 family and in the --erase/--reset runner qualifier groups. - boards/nxp/frdm_mcxa287/: full board file set (board.yml, board.cmake, CMakeLists.txt, Kconfig, Kconfig.frdm_mcxa287, frdm_mcxa287.yaml, .dts/.dtsi/-pinctrl.dtsi, _defconfig, board.c, dts/sram_noecc.overlay, doc/index.rst), plus the mcxa287/ns TrustZone variant. The shared nxp_mcxa5x(_common) devicetree is reused; &enet is explicitly disabled since MCXA287 has no ENET pinctrl group and the shared node has no default status. - todo: TFM. - samples/subsys/edac/tests.yaml: allow frdm_mcxa287 in the nxp_sram_noecc EDAC test, matching frdm_mcxa577. Verified with `west build -b frdm_mcxa287 samples/hello_world` (FLASH 27548B/2MB, RAM 4120B/512KB) and flashed to a physical FRDM-MCXA287 (LinkServer/CMSIS-DAP) with a confirmed boot banner over LPUART1 on COM50 @115200. Signed-off-by: Peter Wang <chaoyi.wang@nxp.com>
The WWDT clock-rate getter special-cased CONFIG_SOC_MCXA577 to call CLOCK_GetWwdt0ClkFreq()/CLOCK_GetWwdt1ClkFreq(), while other MCXA family members fell through to the generic CLOCK_GetWwdtClkFreq(). MCXA287 has no HAL drivers/ directory of its own -- its CMakeLists.txt reuses MCXA577's drivers/fsl_clock.c verbatim, which only implements the "0"/"1"-suffixed getters, not the generic one. As a result, any frdm_mcxa287 build enabling CONFIG_WDT_MCUX_WWDT failed to link with "undefined reference to CLOCK_GetWwdtClkFreq". Add CONFIG_SOC_MCXA287 to the same branch as CONFIG_SOC_MCXA577. This is safe because both SoCs share the same WWDT0/WWDT1 register layout (periph4 in the HAL's per-part register-set selection) and already share the same compiled driver file. Verified by building tests/drivers/watchdog/wdt_basic_api for frdm_mcxa287, which now links and passes. Signed-off-by: Peter Wang <chaoyi.wang@nxp.com>
frdm_mcxa577 already had board-specific overlay/conf overrides in a number of existing driver tests and samples, but the equivalent frdm_mcxa287 files were missing, so those suites silently skipped frdm_mcxa287 even though the underlying driver/peripheral support is identical between the two boards. Add frdm_mcxa287.overlay/.conf files (copied and adapted from the frdm_mcxa577 equivalents) to: samples/boards/nxp/mcxn_a/s2ram samples/boards/nxp/mcxn_a/system_off samples/drivers/adc/adc_dt samples/drivers/dac samples/sensor/die_temp_polling tests/drivers/adc/adc_api tests/drivers/can/timing tests/drivers/comparator/gpio_loopback tests/drivers/dma/loop_transfer tests/drivers/i2c/i2c_target_api tests/drivers/spi/spi_loopback tests/drivers/watchdog/wdt_basic_api and add frdm_mcxa287 to the platform_allow list in the tests.yaml files that gate on an explicit board list rather than devicetree compatibility. Verified by building each of the above samples/tests for frdm_mcxa287 individually; all link successfully. Signed-off-by: Peter Wang <chaoyi.wang@nxp.com>
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August 26, 2026 07:58
1. update the part number to: MCXA577VPN Signed-off-by: Peter Wang <chaoyi.wang@nxp.com>
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| &flash { | ||
| partitions { | ||
| compatible = "fixed-partitions"; |
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use zephyr,mapped-partition
| defined(CONFIG_SOC_MIMXRT798S_CM33_CPU1) | ||
| *rate = CLOCK_GetWdtClkFreq(0); | ||
| #elif defined(CONFIG_SOC_MCXA577) | ||
| #elif CONFIG_SOC_SERIES_MCXAXX7 |
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on Kconfigs we used defined
| /delete-node/ partitions; | ||
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| partitions { | ||
| compatible = "fixed-partitions"; |
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use zephyr,mapped-partition
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| .. _MCX-A287 SoC Website: | ||
| https://www.nxp.com/products/MCX-A28X | ||
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| .. _FRDM-MCXA287 Website: | ||
| https://www.nxp.com/design/design-center/development-boards-and-designs/FRDM-MCXA287 | ||
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| .. _FRDM-MCXA287 User Guide: | ||
| https://www.nxp.com/document/guide/getting-started-with-frdm-mcxa287:GS-FRDM-MCXA287 |
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all these links don't seem to work
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| .. code-block:: console | ||
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| *** Booting Zephyr OS build v3.6.0-4478-ge6c3a42f5f52 *** |
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definitely not version v3.6.0
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| #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(enet)) | ||
| CLOCK_AttachClk(kNONE_to_ENETRMII); | ||
| CLOCK_EnableClock(kCLOCK_GateENET0); | ||
| RESET_PeripheralReset(kENET0_RST_SHIFT_RSTn); | ||
| #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(t1s)) | ||
| /* TENBASET_PHY needs 100 MHz clock */ | ||
| CLOCK_AttachClk(kPll1Clk_to_TENBASET_PHY); | ||
| CLOCK_SetClockDiv(kCLOCK_DivTENBASET_PHY0, 2); | ||
| CLOCK_EnableClock(kCLOCK_GateTENBASET_PHY0); | ||
| RESET_PeripheralReset(kT1S0_RST_SHIFT_RSTn); | ||
| /* Connect ENET to internal TENBASET_PHY0 */ | ||
| SYSCON->ENET_CTRL = SYSCON_ENET_CTRL_PHY_SEL(1) | SYSCON_ENET_CTRL_PHY_INTF(0); | ||
| #else | ||
| /* Connect ENET to external PHY over RMII */ | ||
| SYSCON->ENET_CTRL = SYSCON_ENET_CTRL_PHY_SEL(0) | SYSCON_ENET_CTRL_PHY_INTF(1); | ||
| #endif | ||
| #endif |
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you removed these nodes in the socs dtsi
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Add initial Zephyr board support for FRDM-MCXA287, cloned from the
existing FRDM-MCXA577 enablement since both boards share the same
feature and board schematic. MCXA287 omits ENET, ESPI, T1S, and TSI
relative to MCXA577; every other FRDM-MCXA577 Zephyr feature is
carried over unchanged.